The present invention relates to a liquid crystal display unit and more particularly to a structure of a liquid crystal display unit using transparent electrodes as a pixel electrode and/or a common electrode.
Many liquid crystal display units adopt an active matrix system having a structure including thin film transistors (TFT) as switching elements in a display area in which pixels are provided. The liquid crystal display unit of this kind adopts a structure having a liquid crystal layer disposed between a pair of substrates. TFT elements, a pixel electrode, wiring and electrodes for scanning signals and image signals, terminals for connecting wiring and external driving circuits and the like are formed on one substrate (TFT substrate) and a color filter and an opposite electrode are formed on the other substrate (CF substrate). There is adopted a twisted nematic display system in which a voltage is applied between the pixel electrode on one substrate and the opposite electrode on the other substrate to drive the liquid crystal and control display.
In contrast to the above system, as a system capable of improving a visual field angle or viewing angle and contrast which are problems to be solved in a liquid crystal display unit, JP-A-6-160878 discloses a liquid crystal display unit including a common signal electrode disposed on the TFT substrate instead of the opposite electrode disposed on the substrate on which the color filter is formed and in which a voltage is applied between the pixel electrode in the form of teeth of a comb and the common signal electrode to drive the liquid crystal and control display. The pixel electrode and the common signal electrode may be made of metal for electrodes or wiring or Indium Tin Oxide (ITO) used in a transparent pixel electrode.
As an example in which the ITO electrode is used, S. H. Lee et al. describe in SID ""98 DIGEST, p.371 (1998) and SID ""99 DIGEST, p.202 (1999) a technique that the pixel electrode and the common signal electrode are constituted by two ITO electrodes constituting upper and lower layers between which an insulation layer is disposed and a width of the pixel electrode in the form of teeth of a comb and the common signal electrode and a distance between the electrodes are made minute to be optimized so that a voltage is applied between the two upper and lower ITO electrodes to drive the liquid crystal.
In the above related art, when driving of the liquid crystal and a manufacturing process are considered, it is understood that there are two problems in regard to the driving of the liquid crystal and two problems in regard to the process due to a cross-sectional structure.
The problems will be described.
(1) Problem of Increasing Writing Time of Voltage to Liquid Crystal
In the related art, since the width of the two upper and lower ITO electrodes formed into teeth of a comb and the distance therebetween are made minute to thereby control driving of the liquid crystal, a deviation in alignment of the two upper and lower ITO electrodes in a photolithographic process upon processing of the two upper and lower ITO electrodes and a deviation in processing dimensions produce uneven display characteristic as they are and more particularly scattered brightness. In order to avoid this problem, a method that the lower ITO electrode is formed on a substantially whole surface within a unit pixel area is adopted. Since the lower ITO electrode is formed on the substantially whole surface within the unit pixel area, it is not necessary to consider a deviation in alignment of the upper and lower ITO electrodes. Consequently, scattering of the display characteristic can be reduced.
In the related art, a parasitic capacitance connected in parallel to a liquid crystal layer is newly formed in a portion where the two upper and lower ITO electrodes constituting the pixel electrode and the common signal electrode overlap each other through an inter-layer insulation layer. This parasitic capacitance can be effectively utilized as a capacitance for improving the voltage holding characteristic of the liquid crystal, whereas there causes a problem that a time required until a desired voltage is applied to the liquid crystal layer, that is a writing time of a voltage to the liquid crystal is increased, so that the voltage cannot be applied to the liquid crystal sufficiently, when a voltage is applied between the two upper and lower ITO electrodes.
A method of changing a structure of the insulation layer disposed between the two upper and lower layer ITO electrodes is also one of measures for reducing the parasitic capacitance, although there is a problem that a driving voltage of the liquid crystal is increased as described later.
(2) Problem of Increasing Driving Voltage of Liquid Crystal
When a voltage is applied to the liquid crystal, a potential difference applied to the two upper and lower ITO electrodes is utilized, while an insulation layer also exists in the area where the insulation layer does not exist in a conventional structure, that is, the area which is positioned above the lower ITO electrode and where the upper ITO electrode does not exist and the insulation layer forms a capacitance connected in series to the liquid crystal between the two upper and lower ITO electrodes. Accordingly, part of the potential difference applied to the two upper and lower ITO electrodes is absorbed by the capacitance connected in series to the liquid crystal layer. Consequently, it is necessary to apply between the two upper and lower ITO electrodes the potential difference larger than a desired voltage to be applied to the liquid crystal in consideration of a voltage drop.
More particularly, there is a problem that the driving voltage is increased due to the insulation layer. When the driving voltage is increased, the power consumption is increased and the increased power consumption is not suitable to a portable type liquid crystal display unit particularly. Further, when the driving voltage is increased, a cheap low-voltage driver cannot be used and accordingly there is a problem that the liquid crystal display unit cannot be provided cheaply.
In the conventional structure, as methods of reducing the parasitic capacitance connected in parallel to the liquid crystal layer, (1) a method of increasing a thickness of an insulation layer between the two upper and lower ITO electrodes and (2) a method of changing material of the insulation layer and introducing material having a small dielectric constant or adding a new layer are considered. In other words, when the number of insulation layers is n, the dielectric constant of the k-th insulation layer ∈k and the thickness thereof dk in the portion where the two upper and lower ITO electrodes overlap each other, SA defined by   1            ∑              k        =        1            n        ⁢                  d        k                    ϵ        k            
is made small to thereby reduce the parasitic capacitance. In the conventional structure, however, when the parasitic capacitance is reduced, SA of the insulation layer existing in an area which is positioned above the lower ITO electrode and where the upper ITO electrode does not exist, that is, the insulation layer forming the capacitance connected in series to the liquid crystal layer is also made small to thereby reduce the capacitance connected in series to the liquid crystal layer. Consequently, a voltage drop due to the capacitance connected in series to the liquid crystal is increased to thereby increase the driving voltage of the liquid crystal.
Conversely, in order to reduce the driving voltage of the liquid crystal, when SA of the insulation layer disposed in an area which is positioned above the lower ITO electrode and where the upper ITO electrode does not exist, that is, the insulation layer forming the capacitance connected in series to the liquid crystal layer is increased, SA of the inter-layer insulation layer, that is, the insulation layer forming the parasitic capacitance connected in parallel to the liquid crystal layer is also increased, so that the parasitic capacitance is increased in this case. As described above, in the conventional structure, the reduction of the writing voltage to the liquid crystal and the driving voltage of the liquid crystal have the trade-off relation and it is impossible to reduce the capacitance connected in parallel to the liquid crystal and increase the capacitance connected in series to the liquid crystal.
The problem of processing due to the cross-sectional structure is now described.
(3) Problem of Short-Circuit Between Two Upper and Lower Transparent Electrodes
Generally, a silicon nitride layer formed by the CVD method, for example, is used for the insulation layer of TFT elements. For example, Monosilane, ammonia or the like is used as reaction gas and accordingly the atmosphere for forming layers is the atmosphere of reduction plasma containing active hydrogen. Therefore, when the silicon nitride layer is formed on the ITO layers constituting the two upper and lower transparent electrodes, the surface of the ITO layers constituting the transparent conductive layers of oxide is exposed to the atmosphere of reduction plasma. It is known that the ITO surface is reduced depending on the forming condition and the silicon nitride layer is grown on the ITO extraordinarily (Jpn. J. appl. Phys., 32, p.5072 (1993)). Unevenness of the surface of obtained laminated layers becomes remarkable due to the extraordinary growth, and minuteness and insulation characteristics of the silicon nitride layer itself are reduced. The more the flow rate of the reaction gas which is a supply source of active hydrogen and the higher a temperature of a substrate, the more the reaction of the extraordinary growth of the silicon nitride layer is accelerated. However, in order to obtain a good quality silicon nitride layer for a gate insulation layer of a thin film transistor, it is necessary to maintain the temperature of the substrate to be as high a temperature as about 300 degrees and the layer is formed on the condition that the extraordinary growth tends to be generated. Accordingly, the process that the silicon nitride layer is formed on the ITO layer is in a situation that crack, pinhole and coating defect in a peripheral portion of the silicon nitride layer constituting the inter-layer insulation layer tend to be produced.
When the crack, pinhole and coating defect in the peripheral portion are produced in a portion where the two upper and lower ITO electrodes overlap each other, there occurs a problem that an insulation defect is caused between the upper and lower ITO electrodes and the two upper and lower ITO electrodes are short-circuited.
(4) Problem of Melting of Lower Transparent Electrode, Metal Wiring and Metal Electrode Upon Processing of Upper Transparent Electrode
Generally, the wet etching method is used for processing of the upper ITO electrode layer. Solution of strong acid such as hydracid bromide, hydrochloric acid, aqua regia (solution of hydrochloric acid and nitric acid), hydrochloric acid solution of ferric chloride is used as an etching liquid. When the upper ITO electrode is processed, the insulation layer formed on the lower ITO electrode serves to protect the lower transparent electrode, although when there is a defective portion such as crack, pinhole and coating defect in the peripheral portion, wet etching solution of the ITO layer permeates the insulation layer through the defective portion. When the surface of the lower ITO electrode is directly exposed to the permeated etching solution, the lower ITO electrode is melted and wiring is broken. Further, there is a possibility that an electrode and wiring of metal disposed in a layer lower than the upper ITO electrode are also corroded due to the same phenomenon.
It is an object of the present invention to provide a panel of a liquid crystal display unit including a pixel electrode PX and a common signal electrode constituted by two upper and lower transparent conductive layers having insulation layers disposed therebetween, which can reduce any one or both of a writing time to a liquid crystal and a driving voltage of the liquid crystal and has excellent numerical aperture and transmission factor.
Further, it is another object of the present invention to provide a structure which can attain reduction of defect such as corrosion and disconnection of an electrode constituted by the transparent conductive layer disposed in the lower layer and an electrode and wiring made of material, caused through a defective portion of the insulation layer when the transparent conductive layer disposed in the upper layer is processed through the insulation layer by etching and reduction of short-circuit defect due to defective insulation of the two upper and lower transparent electrodes and can be fabricated with good yield.
A liquid crystal display unit according to an embodiment 1 of the present invention includes a pair of substrate, a liquid crystal layer disposed between the pair of substrates, a plurality of scanning signal lines, a plurality of image signal lines intersecting the plurality of image signal lines in matrix manner and a plurality of thin film transistors each formed in the vicinity of each intersection between the scanning signal lines and the image signal lines disposed on one (first substrate) of the substrates, a plurality of pixels at least one of which is formed in each area enclosed by the plurality of scanning signal lines and image signal lines and each of which includes a common signal electrode connected across a plurality of pixels and a pixel electrode connected to the thin film transistor corresponding thereto, the common signal electrode and the pixel electrode partially overlapping each other through an inter-layer insulation layer, at least part of each of the pixel electrode and the common signal electrode being constituted by a transparent conductive layer, one of the pixel electrode and the common signal electrode disposed on the side of the liquid crystal layer through an insulation layer being formed into slits or teeth of a comb, and further comprises the following means.
(1) The inter-layer insulation layer includes at least one insulation layer or more except a first insulation layer having function of a gate insulation layer of the thin film transistor and a second insulation layer having function of a surface protection layer of the thin film transistor and at least one insulation layer or more except the surface protection layer of the thin film transistor and the gate insulation layer included in the inter-layer insulation layer is selectively formed in conformity with a second electrode in an area where the second electrode is disposed rather than an area which is positioned above a first electrode of the pixel electrode and the common signal electrode, nearer to the first electrode through the insulation layer and where the second electrode does not exist.
(2) In a structure in which a liquid crystal having xcex94∈ of a negative value is used as the liquid crystal layer, when   1            ∑              k        =        1            n        ⁢                  d        k                    ϵ        k            
xe2x80x83is SA where the number of insulation layers included in the inter-layer insulation layer is n and a dielectric constant of a k-th insulation layer is ∈k, a thickness thereof being dk, and   1            (                        ∑                      i            =            1                    m                ⁢                              d            1                                ϵ            1                              )        +                                        ∑                          k              =              1                        n                    ⁢                      d            k                          -                              ∑                          i              =              1                        m                    ⁢                      d            1                                      ϵ        LC            
xe2x80x83(where mxe2x89xa71) is SB where the number of insulation layers disposed between a first orientation layer disposed above a first substrate and a first electrode of the pixel electrode and the common electrode, nearer to the first substrate through insulation layers in an area which is positioned above the first electrode and where a second electrode does not exist is m and a dielectric constant of an insulation layer constituting a first layer is ∈1, a thickness thereof being d1, a dielectric constant of a liquid crystal in a vertical direction to a director of the liquid crystal being ∈LC, SA less than SB is satisfied.
(3) In a structure in which a liquid crystal having xcex94∈ of a positive value is used as the liquid crystal layer, when   1            ∑              k        =        1            n        ⁢                  d        k                    ϵ        k            
xe2x80x83is SA where the number of insulation layers included in the inter-layer insulation layer is n and a dielectric constant of a k-th insulation layer is ∈k, a thickness thereof being dk, and   1            (                        ∑                      i            =            1                    m                ⁢                              d            1                                ϵ            1                              )        +                                        ∑                          k              =              1                        n                    ⁢                      d            k                          -                              ∑                          i              =              1                        m                    ⁢                      d            1                                      ϵ        LC            
xe2x80x83(where mxe2x89xa71) is SB where the number of insulation layers disposed between a first orientation layer disposed above a first substrate and a first electrode of the pixel electrode and the common electrode, nearer to the first substrate through insulation layers in an area which is positioned above the first electrode and where a second electrode does not exist is m and a dielectric constant of an insulation layer constituting a first layer is ∈1, a thickness thereof being d1, a dielectric constant of a liquid crystal in the parallel direction to a director of the liquid crystal being ∈LC, SA less than SB is satisfied.
(4) In the structure in which a liquid crystal having xcex94∈ of a negative value is used as the liquid crystal layer, when   1            ∑              k        =        1            n        ⁢                  d        k                    ϵ        k            
xe2x80x83is SA where any insulation layer does not exist between the first orientation layer disposed above the first substrate and the first electrode in the area which is positioned above the first electrode of the pixel electrode and the common electrode nearer to the first substrate through the insulation layers and where the second electrode does not exist and the number of insulation layers included the inter-layer insulation layer is n, a dielectric constant of the k-th insulation layer being ∈k, a thickness thereof being dk and       ϵ    LC              ∑              k        =        1            n        ⁢          d      k      
xe2x80x83is SB where a dielectric constant of the liquid crystal in the vertical direction to the director of the liquid crystal is ∈LC, SA less than SB is satisfied.
(5) In the structure in which a liquid crystal having xcex94∈ of a positive value is used as the liquid crystal layer, when   1            ∑              k        =        1            n        ⁢                  d        k                    ϵ        k            
xe2x80x83is SA where any insulation layer does not exist between the first orientation layer disposed above the first substrate and the first electrode in the area which is positioned above the first electrode of the pixel electrode and the common electrode nearer to the first substrate through the insulation layers and where the second electrode does not exist and the number of insulation layers included the inter-layer insulation layer is n, a dielectric constant of the k-th insulation layer being ∈k, a thickness thereof being dk and       ϵ    LC              ∑              k        =        1            n        ⁢          d      k      
xe2x80x83is SB where a dielectric constant of the liquid crystal in the parallel direction to the director of the liquid crystal being ∈LC, SA less than SB is satisfied.
With the structures of the above (1) to (5), the trade-off relation between the writing time of a voltage to the liquid crystal and the driving voltage of the liquid crystal which is the problem in the related art structure can be solved. That is, even when any one of the writing time of the voltage to the liquid crystal and the driving voltage of the liquid crystal is improved, the other can ensure the same characteristic as that of the related art structure. Further, a combination of the structures of (1) to (5) can improve oth of the writing time of the voltage to the liquid crystal and the driving voltage of the liquid crystal.
As a method of solving the trade-off relation of the writing time of the voltage to the liquid crystal and the driving voltage, concretely, as described in (1), by adopting the structure that the insulation layer disposed in the area where the upper transparent electrode exists, that is, the insulation layer forming a parasitic capacitance connected in parallel to the liquid crystal layer is not formed in the area which is positioned above the lower transparent electrode and where the upper transparent electrode does not exist, that is, the structure that the insulation layer is selectively formed, the inter-layer insulation layer can be thickened or the structure of the inter-layer insulation layer can be varied to thereby reduce the parasitic capacitance connected in parallel to the liquid crystal layer and change the capacitance connected in series to the liquid crystal layer, so that the trade-off relation of the writing time of the voltage to the liquid crystal and the driving voltage which is the problem in the related art structure can be solved.
Further, with respect to reduction of the driving voltage, as described in (1) to (5), there is adopted the structure that the insulation layer disposed in the area which is positioned above the lower transparent electrode and where the upper transparent electrode does not exist, that is, the insulation layer forming the capacitance connected in series to the liquid crystal is selectively removed rather than the insulation layer between the two upper and lower transparent electrodes in the area where the upper transparent electrode exists, that is, the insulation layer forming the parasitic capacitance connected in parallel to the liquid crystal. Thus, the liquid crystal exists in the area where the insulation layer is selectively removed. In this connection, in order to attain the reduction effect of the driving voltage,       ϵ    LC              ∑              i        =        1            j        ⁢          d      i      
where the dielectric constant of the liquid crystal is ∈LC must be made larger than   1            ∑              i        =        1            j        ⁢                  d        i                    ϵ        i            
where the number of insulation layers removed selectively is j and the dielectric constant of an i-th insulation layer is ∈i, the thickness thereof being di. Here, ∈LC is the dielectric constant in the parallel direction to the director of the liquid crystal in case of the liquid crystal of xcex94∈ having a positive value and ∈LC is the dielectric constant in the vertical direction to the director of the liquid crystal in case of the liquid crystal of xcex94∈ having a negative value. In other words, it is the dielectric constant as viewed from the lower substrate toward the upper substrate when a voltage is applied to the liquid crystal. Only when the above equation is satisfied, the reduction effect of the driving voltage can be obtained. ∈LC of the liquid crystal layer of the liquid crystal display unit generally realized is equal to or larger than 7 and accordingly when it is considered that the selectively formed insulation layer is made of silicon nitride (∈=6 to 7), silicon oxide (∈=3 to 4) or the like, it may be considered that the insulation layer can be selectively removed to reduce the driving voltage in almost all cases.
Further, as a combination of the above systems, concretely, the inter-layer insulation layer is formed into a laminated structure including a part of the insulation layer having function of a gate insulation layer, a part of the insulation layer having function of a surface protection layer of the thin film transistor, for example, and a new insulation layer other than them and the new insulation layer is selectively formed in the area which is positioned above the lower transparent electrode and where the upper transparent electrode exist rather than the area which is positioned above the lower transparent electrode and where the upper transparent electrode does not exist. Further, the insulation layer used in the related art structure can be selectively formed in the same area as the new insulation layer to thereby realize both of reduction of the driving voltage of the liquid crystal and reduction of the writing time of the voltage to the liquid crystal.
More concrete structures for realizing the structures described above are now described.
(6) In (1) to (5), at least one of the number of layers, a thickness of material forming the layers and a dielectric constant of the material forming the layers is different among the inter-layer insulation layer and insulation layers disposed between the first orientation layer formed above the first substrate and the first electrode in the area which is positioned above the first electrode and where the second electrode does not exist.
(7) In (1) to (6), the inter-layer insulation layer is constituted by a single layer and the single layer is selectively formed in conformity with a shape of the second electrode in a part of an area where the second electrode is disposed rather than the area which is positioned above the first electrode and where the second electrode does not exist.
(8) In (7), the inter-layer insulation layer is a part of a first insulation layer having function of a gate insulation layer of the thin film transistor or a part of a second insulation layer having function of a surface protection layer of the thin film transistor.
(9) In (7), the inter-layer insulation layer is a third insulation layer other than a first insulation layer having function of a gate insulation layer of the thin film transistor or a second insulation layer having function of a surface protection layer of the thin film transistor.
(10) In (1) to (6), the inter-layer insulation layer is constituted by two layers and at least one layer thereof is selectively formed in conformity with a shape of the second electrode in a part of an area where the second electrode is disposed rather than the area which is positioned above the first electrode and where the second electrode does not exist.
(11) In (10), the inter-layer insulation layer is constituted by two layers including a part of a first insulation layer having function of a gate insulation layer of the thin film transistor and a part of a second insulation layer having function of a surface protection layer of the thin film transistor.
(12) In (10), one layer of the inter-layer insulation layers is a part of a first insulation layer having function of a gate insulation layer of the thin film transistor or a part of a second insulation layer having function of a surface protection layer of the thin film transistor and the other is a third insulation layer other than the first and second insulation layers, which is selectively formed in conformity with the shape of the second electrode in the part of the area where the second electrode is disposed rather than the area which is positioned above the first electrode and where the second electrode does not exist.
(13) In (10), one layer of the inter-layer insulation layers is any of a part of a first insulation layer having function of a gate insulation layer of the thin film transistor or a part of a second insulation layer having function of a surface protection layer of the thin film transistor and the other is a fourth insulation layer other than the first and second insulation layers, which is formed in a part of an area except an area for forming a through-hole for connecting the second electrode to other electrode wiring and an area for exposing a terminal.
(14) In (10), the inter-layer insulation layer is constituted by a laminated layer including a third insulation layer other than a first insulation layer having function of a gate insulation layer of the thin film transistor or a second insulation layer having function of a surface protection layer of the thin film transistor, which is selectively formed in conformity with the shape of the second electrode in the part of the area where the second electrode is disposed rather than the area which is positioned above the first electrode and where the second electrode does not exist, and a fourth insulation layer formed in a part of an area except an area for forming a through-hole for connecting the second electrode to other electrode wiring and an area for exposing a terminal.
(15) In (1) to (6), the inter-layer insulation layer is constituted by three or more layers and at least one layer thereof is selectively formed in conformity with a shape of the second electrode in a part of an area where the second electrode is disposed rather than the area which is positioned above the first electrode and where the second electrode does not exist.
(16) In (15), the inter-layer insulation layer includes a part of a first insulation layer having function of a gate insulation layer of the thin film transistor, a part of a second insulation layer having function of a surface protection layer of the thin film transistor, and all of a third insulation layer except the first and second insulation layers, which is selectively formed in conformity with the shape of the second electrode in a part of an area which is positioned above the first electrode and where the second electrode is disposed.
(17) In (15), the inter-layer insulation layer includes a part of a first insulation layer having function of a gate insulation layer of the thin film transistor, a part of a second insulation layer having function of a surface protection layer of the thin film transistor, and all of a fourth electrode except the first and second electrodes, which is formed in a part of an area except an area for forming a through-hole for connecting the second electrode to other electrode wiring and an area for exposing a terminal.
(18) In (15), the inter-layer insulation layer includes at least any one of a part of a first insulation layer having function of a gate insulation layer of the thin film transistor and a part of a second insulation layer having function of a surface protection layer of the thin film transistor, a third insulation layer except the first and second insulation layers, which is selectively formed in conformity with the shape of the second electrode in a part of an area which is positioned above the first electrode and where the second electrode is disposed, and a fourth insulation layer formed in a part of an area except an area for forming a through-hole for connecting the second electrode to other electrode wiring and an area for forming a terminal.
(19) In (1) to (18), when a width of a pattern of the insulation layer selective formed in conformity with the second shape in a part of the area where the second electrode is disposed rather than the area which is positioned above the first electrode and where the second electrode does not exist is WISO (xcexcm) and a width of the second electrode and a space between the second electrodes formed into slits or teeth of a comb are WEL (xcexcm) and WSP (xcexcm), respectively,
WISOxe2x88x922xe2x89xa6WELxe2x89xa6WISO+2
WISO greater than 0
WISO less than WEL+WSP
are satisfied.
(20) In (7), (9), (10), (12) to (19), the third and fourth insulation layers are constituted by applied-type insulation layers.
(21) In (20), the applied-type insulation layer is formed by means of printing, spin coat or the like and more particularly the applied-type insulation layer is an insulation layer made of organic resin or Si.
(22) In (21) and (22), the applied-type insulation layer used as the third insulation layer is of photo-image type.
(23) In (20) to (22), the third insulation layer is processed in self-alignment with the second electrode collectively, so that the first area is formed in the second area selectively.
(24) In (20) to (23), a thickness of the third insulation layer is 0.2 xcexcm to 4.0 xcexcm.
(25) In (20) to (24), a dielectric constant of the third insulation layer is 1.5 to 6.5.
(26) In (20) and (21), a thickness of the applied-type insulation layer used as the fourth insulation layer is 0.1 xcexcm to 2 xcexcm.
(27) When a fifth insulation layer having a dielectric constant equal to or larger than 7.0 is selectively formed in a first area which is positioned above the first electrode and where the second electrode does not exist and a thickness of a fifth insulation layer is DA, a total thickness of insulation layers disposed between a first orientation layer disposed above the first substrate and the first electrode in an area which is positioned above the first electrode and where the second electrode does not exist being DB, a thickness of the inter-layer insulation layer being DC, a thickness of the second electrode being DD, DA+DBxe2x89xa6DC+DD is satisfied.
With the structure of the above (27), the driving voltage can be reduced regardless of the dielectric constant of the liquid crystal. The problems in the processes described in the example of the related art can be also solved with this structure at the same time.
In this system, the insulation layer having function of the gate insulation layer and the insulation layer except the surface protection layer of the thin film transistor are newly added and the applied-type insulation layer is applied to the insulation layers. The applied-type insulation layer has function of leveling a step or a difference in level existing in the groundwork by coating and embedding the step when the applied-type insulation layer is coated. In other words, the applied-type insulation layer has function of coating the crack, pinhole and coating defect in a peripheral portion existing in the silicon nitride layer. With this function, a short-circuit defect caused by an insulation defect between the two upper and lower transparent electrodes can be prevented by the applied-type insulation layer formed selectively so as to reduce the parasitic capacitance. Further, by implementing the process of selectively forming the applied-type insulation layer after formation of the upper transparent electrode, even the area which is positioned above the lower transparent electrode and where the upper transparent electrode does not exist can be coated by the applied-type insulation layer upon processing of the upper transparent electrode.
Thus, the crack, pinhole and coating defect in a peripheral portion of the insulation layer existing in the area which is positioned above the lower transparent electrode and where the upper transparent electrode does not exist are also coated with and embedded by the applied-type insulation layer to be protected and accordingly it can be prevented that wet etching solution for the upper transparent electrode permeates lower layers through the defective portion. That is, melting and disconnection of the lower transparent electrode caused upon processing of the upper transparent electrode can be prevented. Further, corrosion and disconnection of electrodes and wiring made of metal can be also prevented by the same effect.
Moreover, even when the process of selectively forming the applied-type insulation layer is implemented before formation of the upper transparent electrode, a part of the applied-type insulation layer is left in the area requiring the coating protection in the portion where the upper transparent electrode does not exist or the applied-type insulation layer made of different material and different from the selectively formed applied-type insulation layer is added to be formed in the area for forming a through-hole for connecting the upper transparent electrode to other electrode wiring and the area except a portion for exposing a terminal and which requires the coating protection, to thereby solve the above problems.